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On 23/10/2024 3:53 am, Edward Rawde wrote:"Edward Rawde" <invalid@invalid.invalid> wrote in message>
news:vf7c4h$1m5m$1@nnrp.usenet.blueworldhosting.com...But I suspect that component tolerances and mismatched FETs will
ruin it.
Can anyone tell me what causes the following feature of the circuit
below? This circuit is not exactly the same as the previous one but
all versions seem to have this behaviour.
Run a simulation and view the output.
You can see that there's distortion until about 1.8 seconds when it
disappears. View J1 or J2 gate voltage. You can see that the crud
suddenly reduces at 1.8 seconds. What's causing that and is there a
way to make the circuit always run in reduced crud mode?
I'll be back in about a week to thank whoever can explain this.
I can't see any crud. And comparing the FFT's of the outputs of U2 and
and the "filtered" output at U1, the third harmonic content is much the
same.
>
Just for kicks, I added a third op amp - an LT1056 - as a unity gain
follower on U2's output - on to drive R9 (in the
same way that U3 drives R16) to keep the spikey rectifier drive current
out of U2 - the op amp generating the "pure" sine wave.
>
It didn't make any difference.
>
My guess is that most of the harmonic content is from the 1mV sawtooth
on the two FET gates which capacitatively couples into the FET
conduction channel.
>
An opto-FET might do better.
>
https://www.mouser.com/datasheet/2/149/h11f1m-185284.pdf
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