Sujet : Re: 38 Mb/mm^2 SRAM
De : jl (at) *nospam* glen--canyon.com (john larkin)
Groupes : sci.electronics.designDate : 31. Oct 2024, 17:55:13
Autres entêtes
Organisation : A noiseless patient Spider
Message-ID : <efd7ijdgngald93hd40spgc73or40p6mim@4ax.com>
References : 1 2 3
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On Thu, 31 Oct 2024 17:36:23 +0100, Jeroen Belleman
<
jeroen@nospam.please> wrote:
On 10/31/24 16:01, Sylvia Else wrote:
On 31-Oct-24 8:46 pm, Jan Panteltje wrote:
SRAM scaling isn't dead after all TSMC's 2nm process tech claims
major improvements
https://www.tomshardware.com/tech-industry/sram-scaling-isnt-dead-after-all-tsmcs-2nm-process-tech-claims-major-improvements#main
>
gate all around tech...
38 Mb/mm^2
>
If my arithmetic is right, there are about 50 atoms of silicon per cubic
nanometre. Surely we're approaching the limits of this.
Sylvia.
Some day we'll hit the limit. That won't be a disaster.
>
The stated '2nm process' has little to do with the actual size
of features on the chip. It has become a sales argument rather
than the true size of something.
>
Jeroen Belleman
But two is still better than 50. Probably.