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On 15/11/2024 3:14 am, Edward Rawde wrote:"JM" <sunaecoNoChoppedPork@gmail.com> wrote in message news:t5fajjdteskfftvkf84iqsp2vc4b9ta5kj@4ax.com...>On Fri, 8 Nov 2024 15:43:41 -0500, "Edward Rawde"
<invalid@invalid.invalid> wrote:
I finally got around to digging out my AD734 based Wein bridge simulation, and created a FET based version.
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It's got a nasty 163kHz generator embedded in it somewhere, and I've put in an RL filter to keep that under control.
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The double Sallen and Keys network is a four pole Bessel filter which I'm using as a 250usec delay line - the output from the full
wave rectifier has an appreciable 2kHz component, but the delayed contribution coming into the integrator through R9 roughly
cancels the direct input through R20.
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R10 in the integrator damps the amplitude feedback loop for a dead-beat response.
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The harmonics in the 1kHz output are about 100dB below the fundamental. Not great, but respectable, and not worth trying to
improve in a simulation.
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The circuit still works with the worst case values for the 1% capacitors at C5 and C6.
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