Re: DDS, again

On 12/12/2024 5:50 am, john larkin wrote:

On Tue, 10 Dec 2024 18:38:18 -0800, john larkin <JL@gct.com> wrote:
 

I have been unsuccessful in getting LT Spice to simulate a DDS
frequency generator. It's bad enough trying to make the NCO part, but
whenever I get close it stalls or throws convergence errors.
>
So I wrote a PowerBasic program that's the 32-bit NCO...  GC_Num.exe.
>
Making a proper .WAV file would be a nightmare, so it outputs as a
text file with just    time  data    per line, where  data  is the
selected number of MS bits of the phase accumulator.
>
LT Spice can read the file, and then do whatever it wants: sine, DAC,
filter, comparator, FFTs.
>
https://www.dropbox.com/scl/fo/o0mdxxqvxupg6ynz7i7rx/AMPMbv9NOY4mJFXggTGUqJ8?rlkey=9ecl38npbgy8kxuzd9bako4kr&dl=0
>
Spice reads the file as a piecewise-linear thing, so wrecks the nice
MSB data steps. I had to fool it by outputting each clocked phase
accumulator value twice, as
>
bits   time
bits   time+0.9*clock_period
>
same data bits both lines. Looks pretty steppy.

 Given a 40 MHz phase accumulator, one could spin up a clock at some
mutiple, 160 MHz maybe, and fake the dac/lowpass/comparator thing to
reduce jitter.
 I think it's just a lookup table on some MSBs of the 40 MHz phase
accumulator. Of course the new  fake DDS clock output would be
quantized to the 160 MHz clock domain. Maybe.

The whole point about DDS frequency synthesis scheme is that it isn't limited to the master clock edges.
The sine-look-up table gives you a staircase approximation to the desired sine wave, which is limited in just that way, but as soon as you low-pass filter the staircase steps into a smooth slope, your zero-crossings can move smoothly and continuously.
Faking that stage is - at least in theory - doable, but it's going to be messier than the DAC-low-pass filter scheme, which has the advantage of being popular (so that there are lots of standard parts available) and easier to explain.
--
Bill Sloman, Sydney