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Bill Sloman wrote:This just reworks my circuit to use a controllable asymmetric current mirror instead of the FET for gain control. I take the>
feedback from the full wave rectifier and switch every half-cycle to reconstruct a variable amplitude sine wave to control the
output amplitude. It does use a lot of components, but it strikes me as fairly comprehensible.
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First I corrected the usual line wrap issues.
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In the latest LTSpice (24.1.0) it took me a good hour or two to find out why I was getting strange netlist errors for all the opamps
in the circuit.
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This turned out to be .ENDS in the BAS70L model. Remove .ENDS and the issues go away.
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So this is the circuit I'm simulating in 24.1.0 with no component updates available.
I'm expecting it to take 2 hours to complete.
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