Liste des Groupes | Revenir à se design |
On 16/01/2025 2:57 pm, Edward Rawde wrote:"Bill Sloman" <bill.sloman@ieee.org> wrote in message news:vm9tod$37i55$1@dont-email.me...>On 16/01/2025 7:23 am, Edward Rawde wrote:>"Don" <g@crcomp.net> wrote in message news:20250115a@crcomp.net...>Edward Rawde wrote:>Bill Sloman wrote:>This just reworks my circuit to use a controllable asymmetric current mirror instead of the FET for gain control. I take the>
feedback from the full wave rectifier and switch every half-cycle to reconstruct a variable amplitude sine wave to control
the
output amplitude. It does use a lot of components, but it strikes me as fairly comprehensible.
>
First I corrected the usual line wrap issues.
>
In the latest LTSpice (24.1.0) it took me a good hour or two to find out why I was getting strange netlist errors for all the
opamps
in the circuit.
>
This turned out to be .ENDS in the BAS70L model. Remove .ENDS and the issues go away.
>
So this is the circuit I'm simulating in 24.1.0 with no component updates available.
I'm expecting it to take 2 hours to complete.
Thank you for your tip to wait 2 hours for results. For what it's worth,
Bill's original LTSpice source worked for me "as is."
It did for me too, but because it looked like simulation time would be long I moved it to another machine I use over remote
desktop.
On that machine LTSpice asked if I'd like the latest version so I upgraded to 24.1.0.
After the upgrade I got very strange netlist errors which didn't mention BAS70L and it took a while to figure out the cause.
>
I'm now revising the simulation time to a minimum of 4 days for 10 seconds.
24.1.0 seems to be faster.
My computer seems to be faster. It mostly simulates at about 25msec/sec for me so I get my 10 seconds in about seven minutes of
real time. There are spots early in the process where it slows down, but not for long.
>
I pushed up R27 from 9.1R to 13R to make the Ic(Q6) and Ic(Q9) peak currents more nearly equal - you lose some base current in
the
second current mirror and R7 corrects for that.
>
It doesn't make much difference to the third harmonic content in the output which is still only 59 dB below the fundamental. I
suppose I ought to low pass filter the current through R30 with a filter with a 1msec propagation delay, but that would be even
more components.
With an FFT from 525-536ms with Blackman-Harris window I'm seeing nearly 100dB down at 1kHz and 80dB at 2kHz.
But there's also crud only 60dB down at 600kHz where crud means an almost contiuous spectrum between 500kHz and 600kHz.
This sounds like a typo.
The fundamental is at 1kHz, and I've set up the circuit so that it is just above 0dB. The second harmonic at 2kHz is about
at -80dB, but the third harmonic at 3kHz is at about -60dB. Numerical integration does produce high frequency crud - also known as
rounding error and quantisation error. We'd have to build a real circuit to get a credible idea of how it performed at high
frequencies, and you have to build it fairly carefully to avoid lots of crud on the supply rails, which gets everywhere.
>
My full-wave rectifier does do some fast switching, which could make it a noise source.
>
--
Bill Sloman, Sydney
Les messages affichés proviennent d'usenet.