Re: DDS question: why sine lookup?

On 07/05/2025 21:01, john larkin wrote:

On Wed, 7 May 2025 20:32:41 +0100, Martin Brown
<'''newspam'''@nonad.co.uk> wrote:
 

On 06/05/2025 16:48, john larkin wrote:

A DDS clock generator uses an NCO (a phase accumulator) and takes some
number of MSBs, maps through a sine lookup table, drives a DAC and a
lowpass filter and finally a comparator. The DAC output gets pretty
ratty near Nyquist, and the filter smooths out and interpolates the
steps and reduces jitter.
>
But why do the sine lookup? Why not use the phase accumulator MSBs
directly and get a sawtooth, and filter that?

>
A saw tooth wave has a huge step like discontinuity in it which looks
very ugly in the frequency domain with strong harmonics. Strong sharp
features in time domain are broad in frequency space and vice versa.
>
If you wanted something a bit different then detecting the phase
accumulator overflow and reversing the count sense to get a triangle
wave might be an option (at half the frequency). Needs some very careful
maths at the boundary flips to avoid introducing jitter.
>
 From that triangle wave you can use HP's wizard diode shaping network
trick to get a pretty good clean sine wave.

 Yes, a triangle would be better than a sawtooth... fewer nasty
subharmonics. But we may as well stick with the classic boring sine
wave. The sine lookup is trivial in an FPGA.

Actually that suggests to me a bonkers way to do it with an analogue multiplier and a flipflop to fiddle the phase. Generate two waveforms from the phase accumulator MSB one rising and one falling. PHACC and ~PHACC.
Multiply the two sawtooth waves together in an analogue multiplier and then you get a nice parabolic approximation to half a sine wave.
/|/|/|/|/| x \|\|\|\| = .o.o.o.o
Then flip alternate half cycles negative with your crude square wave.
--
Martin Brown