Re: LTSpice model for a SiC MOSFET

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Sujet : Re: LTSpice model for a SiC MOSFET
De : jl (at) *nospam* glen--canyon.com (john larkin)
Groupes : sci.electronics.design
Date : 20. May 2025, 16:44:30
Autres entêtes
Organisation : A noiseless patient Spider
Message-ID : <0p8p2k5lq8gr9csk11k7e03h3un4fmemp9@4ax.com>
References : 1 2 3 4 5 6 7 8
User-Agent : ForteAgent/8.00.32.1272
On Tue, 20 May 2025 10:53:58 -0400, legg <legg@nospam.magma.ca> wrote:

On Tue, 20 May 2025 17:49:54 +1000, Bill Sloman <bill.sloman@ieee.org>
wrote:
>
On 20/05/2025 5:48 am, legg wrote:
On Tue, 20 May 2025 03:21:37 +1000, Bill Sloman <bill.sloman@ieee.org>
wrote:
 
On 19/05/2025 11:33 pm, legg wrote:
On Mon, 19 May 2025 12:23:54 +1000, Bill Sloman <bill.sloman@ieee.org>
wrote:
>
On 19/05/2025 12:15 am, john larkin wrote:
On Sun, 18 May 2025 18:11:58 +1000, Bill Sloman <bill.sloman@ieee.org>
wrote:
>
I'm looking at a problem where somebody wants to step down a 1kV low
current source to 3.3V.
>
The Baxandall class-D oscillator could do it, but it needs a pair 1.7kV
MOSFETs for the job. The Infineon SiC IMH170R450M1 would do it - though
it's a much higher current part (10A) than the job needs (about 1mA).
>
I've dived into the Infineon rabbit-hole which promises LTSpice models,
but wasn't able to find one.
>
Does anybody know of a similar - ideally cheaper and smaller - part for
which there is an LTSpice model?
>
I use a Cree/Wolfspeed 1200v part, C2M0280120D, in my Pockels Cell
driver.
>
https://www.dropbox.com/scl/fi/5arhyamrp0bl3tgb2fasn/DSC02771.JPG?rlkey=3ttcc2yt6s9nrtdouuv3aneol&raw=1
>
They do have an LT Spice model library that works.
>
Gate drive for SiC parts is a bear. I did it myself, but I think there
are chips for that now.
>
There are multi-kilovolt silicon mosfets too.
>
Baxandal looks to be inefficient and expensive as a low power
converter. The drain swing is 2x the supply voltage, and it needs two
fets and a difficult custom transformer.
>
It isn't going to be inefficient. That configuration is famous efficient.
>
The drain swing is actually 1.67 times the supply voltage, but it does
need two switching devices and a specially wound transformer (and we
know how reluctant you are to design them or get them made).
>
It is probably going to be too expensive for the application, and we'd
be grateful for your insights into a cheaper alternative. I can't think
of one.
>
I'd keep it simple and repurpose a backwards commodity CCFL ($0.50)
   transformer, in a low frequency (20-50KHz) buck regulator 'of sorts'.
>
Cold cathode fluorescent lamps are cranky beasts, and Jim Williams
exploited the Baxandal configuration to get the voltages they need out
of low voltage supplies, using bipolar transistor switches. I would not
be all that optimistic about finding a CCFL transformer that I could
repurpose.
>
Designing a transformer for the job isn't all that difficult and finding
a local transformer shop to wind it wasn't all that hard when I did
something similar in the Netherlands  some twenty years ago.
>
A 1KV mosfet (why SIC?) would act as it's own TVS if the source was
really self-limited. 2$
>
The SIC part costs about $5.00. The guy I'm talking to came up with $200
regular silicon part with a higher on resistance and about ten times the
internal capacitances. I'm not recommending SiC on principle - the
limited search I did came up with a SiC part which looked as if might
work, even if still too expensive to be attractive.
>
<snipped badly formatted list>
>
The highest voltage part in there was good for 1.5kV, so not good enough.
>
Bill,  the Baxandal cct is great in lower voltage input applications,
but the one thing you don't want to do with HV sources is ADD voltage
stress.

Bax is, as the saying goes, "component rich."


Date Sujet#  Auteur
18 May09:11 * LTSpice model for a SiC MOSFET88Bill Sloman
18 May15:15 +* Re: LTSpice model for a SiC MOSFET50john larkin
19 May03:23 i`* Re: LTSpice model for a SiC MOSFET49Bill Sloman
19 May04:38 i +* Re: LTSpice model for a SiC MOSFET34john larkin
19 May09:19 i i`* Re: LTSpice model for a SiC MOSFET33Bill Sloman
19 May14:29 i i +* Re: LTSpice model for a SiC MOSFET16john larkin
19 May18:02 i i i`* Re: LTSpice model for a SiC MOSFET15Bill Sloman
19 May19:28 i i i `* Re: LTSpice model for a SiC MOSFET14Edward Rawde
19 May23:14 i i i  +* Re: LTSpice model for a SiC MOSFET2john larkin
20 May08:23 i i i  i`- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May08:26 i i i  `* Re: LTSpice model for a SiC MOSFET11Bill Sloman
20 May16:04 i i i   `* Re: LTSpice model for a SiC MOSFET10Mike Perkins
20 May17:38 i i i    `* Re: LTSpice model for a SiC MOSFET9Bill Sloman
20 May18:03 i i i     `* Re: LTSpice model for a SiC MOSFET [OT]8Liz Tuddenham
21 May12:59 i i i      `* Re: LTSpice model for a SiC MOSFET [OT]7legg
21 May13:03 i i i       +* Re: LTSpice model for a SiC MOSFET [OT]5Liz Tuddenham
21 May18:16 i i i       i`* Re: LTSpice model for a SiC MOSFET [OT]4john larkin
21 May18:51 i i i       i +* Re: LTSpice model for a SiC MOSFET [OT]2Phil Hobbs
21 May19:19 i i i       i i`- Re: LTSpice model for a SiC MOSFET [OT]1Bill Sloman
21 May21:14 i i i       i `- Re: LTSpice model for a SiC MOSFET [OT]1Liz Tuddenham
21 May13:34 i i i       `- Re: LTSpice model for a SiC MOSFET [OT]1Bill Sloman
19 May19:26 i i `* Re: LTSpice model for a SiC MOSFET16Edward Rawde
19 May23:24 i i  +* Re: LTSpice model for a SiC MOSFET2john larkin
20 May08:43 i i  i`- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May08:34 i i  `* Re: LTSpice model for a SiC MOSFET13Bill Sloman
20 May14:38 i i   `* Re: LTSpice model for a SiC MOSFET12Edward Rawde
20 May14:51 i i    +- Re: LTSpice model for a SiC MOSFET1john larkin
20 May14:54 i i    +- Re: LTSpice model for a SiC MOSFET1John R Walliker
20 May17:48 i i    `* Re: LTSpice model for a SiC MOSFET9Bill Sloman
20 May18:44 i i     `* Re: LTSpice model for a SiC MOSFET8Edward Rawde
21 May07:39 i i      `* Re: LTSpice model for a SiC MOSFET7Bill Sloman
21 May14:42 i i       `* Re: LTSpice model for a SiC MOSFET6Edward Rawde
21 May16:26 i i        +- Re: LTSpice model for a SiC MOSFET1Bill Sloman
21 May16:37 i i        `* Re: LTSpice model for a SiC MOSFET4john larkin
21 May16:43 i i         +* Re: LTSpice model for a SiC MOSFET2Edward Rawde
21 May18:52 i i         i`- Re: LTSpice model for a SiC MOSFET1Bill Sloman
21 May18:49 i i         `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
19 May14:33 i `* Re: LTSpice model for a SiC MOSFET14legg
19 May18:21 i  +* Re: LTSpice model for a SiC MOSFET11Bill Sloman
19 May20:48 i  i`* Re: LTSpice model for a SiC MOSFET10legg
20 May08:49 i  i `* Re: LTSpice model for a SiC MOSFET9Bill Sloman
20 May15:53 i  i  `* Re: LTSpice model for a SiC MOSFET8legg
20 May16:44 i  i   +* Re: LTSpice model for a SiC MOSFET4john larkin
20 May18:15 i  i   i`* Re: LTSpice model for a SiC MOSFET3Bill Sloman
21 May03:42 i  i   i `* Re: LTSpice model for a SiC MOSFET2john larkin
21 May07:46 i  i   i  `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May18:05 i  i   `* Re: LTSpice model for a SiC MOSFET3Bill Sloman
21 May13:11 i  i    `* Re: LTSpice model for a SiC MOSFET2legg
21 May16:41 i  i     `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May15:04 i  `* Re: LTSpice model for a SiC MOSFET2john larkin
20 May18:25 i   `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
18 May17:03 +- Re: LTSpice model for a SiC MOSFET1legg
18 May17:12 +* Re: LTSpice model for a SiC MOSFET6legg
19 May09:27 i`* Re: LTSpice model for a SiC MOSFET5Bill Sloman
19 May13:48 i `* Re: LTSpice model for a SiC MOSFET4legg
19 May14:12 i  `* Re: LTSpice model for a SiC MOSFET3Bill Sloman
19 May20:28 i   `* Re: LTSpice model for a SiC MOSFET2legg
20 May09:36 i    `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
19 May16:13 +* Re: LTSpice model for a SiC MOSFET26Liz Tuddenham
19 May17:56 i+* Re: LTSpice model for a SiC MOSFET6john larkin
22 May09:44 ii`* Re: LTSpice model for a SiC MOSFET5Liz Tuddenham
22 May15:36 ii `* Re: LTSpice model for a SiC MOSFET4john larkin
22 May16:50 ii  `* Re: LTSpice model for a SiC MOSFET3Liz Tuddenham
22 May17:50 ii   `* Re: LTSpice model for a SiC MOSFET2john larkin
23 May10:04 ii    `- Re: LTSpice model for a SiC MOSFET1Liz Tuddenham
20 May09:46 i`* Re: LTSpice model for a SiC MOSFET19Bill Sloman
20 May10:58 i +* Re: LTSpice model for a SiC MOSFET8Liz Tuddenham
20 May18:34 i i`* Re: LTSpice model for a SiC MOSFET7Bill Sloman
21 May12:05 i i `* Re: LTSpice model for a SiC MOSFET6Liz Tuddenham
21 May13:44 i i  +* Re: LTSpice model for a SiC MOSFET3Bill Sloman
21 May14:19 i i  i`* Re: LTSpice model for a SiC MOSFET2Liz Tuddenham
21 May16:51 i i  i `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
21 May15:41 i i  `* Re: LTSpice model for a SiC MOSFET2john larkin
21 May18:55 i i   `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May18:47 i `* Re: LTSpice model for a SiC MOSFET10KevinJ93
21 May08:20 i  `* Re: LTSpice model for a SiC MOSFET9Bill Sloman
22 May02:20 i   `* Re: LTSpice model for a SiC MOSFET8KevinJ93
22 May09:12 i    `* Re: LTSpice model for a SiC MOSFET7Bill Sloman
22 May11:43 i     `* Re: LTSpice model for a SiC MOSFET6piglet
22 May14:41 i      +* Re: LTSpice model for a SiC MOSFET3Bill Sloman
22 May19:46 i      i`* Re: LTSpice model for a SiC MOSFET2piglet
23 May06:17 i      i `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
22 May15:42 i      `* Re: LTSpice model for a SiC MOSFET2john larkin
22 May17:28 i       `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
19 May19:35 `* Re: LTSpice model for a SiC MOSFET4Edward Rawde
20 May08:54  `* Re: LTSpice model for a SiC MOSFET3Bill Sloman
20 May15:28   `* Re: LTSpice model for a SiC MOSFET2Edward Rawde
20 May18:42    `- Re: LTSpice model for a SiC MOSFET1Bill Sloman

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