Re: LTSpice model for a SiC MOSFET

Liste des GroupesRevenir à se design 
Sujet : Re: LTSpice model for a SiC MOSFET
De : bill.sloman (at) *nospam* ieee.org (Bill Sloman)
Groupes : sci.electronics.design
Date : 20. May 2025, 18:15:01
Autres entêtes
Organisation : A noiseless patient Spider
Message-ID : <100idap$2at8a$4@dont-email.me>
References : 1 2 3 4 5 6 7 8 9
User-Agent : Mozilla Thunderbird
On 21/05/2025 1:44 am, john larkin wrote:
On Tue, 20 May 2025 10:53:58 -0400, legg <legg@nospam.magma.ca> wrote:
 
On Tue, 20 May 2025 17:49:54 +1000, Bill Sloman <bill.sloman@ieee.org>
wrote:
>
On 20/05/2025 5:48 am, legg wrote:
On Tue, 20 May 2025 03:21:37 +1000, Bill Sloman <bill.sloman@ieee.org>
wrote:
>
On 19/05/2025 11:33 pm, legg wrote:
On Mon, 19 May 2025 12:23:54 +1000, Bill Sloman <bill.sloman@ieee.org>
wrote:
>
On 19/05/2025 12:15 am, john larkin wrote:
On Sun, 18 May 2025 18:11:58 +1000, Bill Sloman <bill.sloman@ieee.org>
wrote:
<snip>

Bill,  the Baxandal cct is great in lower voltage input applications,
but the one thing you don't want to do with HV sources is ADD voltage
stress.
 Bax is, as the saying goes, "component rich."
It's a more complicated circuit than John Larkin likes to play with.
It's got a special purpose transformer, the feed inductor and two switching transistors. In theory you have to add a capacitor across the transformer to create the resonant tank, but for the application I'm talking about it may be difficult to wind the transformer with a low enough parallel capacitance to get the sort of resonant frequency I'd like to see.
That's not a lot of components.
--
Bill Sloman, Sydney

Date Sujet#  Auteur
18 May09:11 * LTSpice model for a SiC MOSFET88Bill Sloman
18 May15:15 +* Re: LTSpice model for a SiC MOSFET50john larkin
19 May03:23 i`* Re: LTSpice model for a SiC MOSFET49Bill Sloman
19 May04:38 i +* Re: LTSpice model for a SiC MOSFET34john larkin
19 May09:19 i i`* Re: LTSpice model for a SiC MOSFET33Bill Sloman
19 May14:29 i i +* Re: LTSpice model for a SiC MOSFET16john larkin
19 May18:02 i i i`* Re: LTSpice model for a SiC MOSFET15Bill Sloman
19 May19:28 i i i `* Re: LTSpice model for a SiC MOSFET14Edward Rawde
19 May23:14 i i i  +* Re: LTSpice model for a SiC MOSFET2john larkin
20 May08:23 i i i  i`- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May08:26 i i i  `* Re: LTSpice model for a SiC MOSFET11Bill Sloman
20 May16:04 i i i   `* Re: LTSpice model for a SiC MOSFET10Mike Perkins
20 May17:38 i i i    `* Re: LTSpice model for a SiC MOSFET9Bill Sloman
20 May18:03 i i i     `* Re: LTSpice model for a SiC MOSFET [OT]8Liz Tuddenham
21 May12:59 i i i      `* Re: LTSpice model for a SiC MOSFET [OT]7legg
21 May13:03 i i i       +* Re: LTSpice model for a SiC MOSFET [OT]5Liz Tuddenham
21 May18:16 i i i       i`* Re: LTSpice model for a SiC MOSFET [OT]4john larkin
21 May18:51 i i i       i +* Re: LTSpice model for a SiC MOSFET [OT]2Phil Hobbs
21 May19:19 i i i       i i`- Re: LTSpice model for a SiC MOSFET [OT]1Bill Sloman
21 May21:14 i i i       i `- Re: LTSpice model for a SiC MOSFET [OT]1Liz Tuddenham
21 May13:34 i i i       `- Re: LTSpice model for a SiC MOSFET [OT]1Bill Sloman
19 May19:26 i i `* Re: LTSpice model for a SiC MOSFET16Edward Rawde
19 May23:24 i i  +* Re: LTSpice model for a SiC MOSFET2john larkin
20 May08:43 i i  i`- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May08:34 i i  `* Re: LTSpice model for a SiC MOSFET13Bill Sloman
20 May14:38 i i   `* Re: LTSpice model for a SiC MOSFET12Edward Rawde
20 May14:51 i i    +- Re: LTSpice model for a SiC MOSFET1john larkin
20 May14:54 i i    +- Re: LTSpice model for a SiC MOSFET1John R Walliker
20 May17:48 i i    `* Re: LTSpice model for a SiC MOSFET9Bill Sloman
20 May18:44 i i     `* Re: LTSpice model for a SiC MOSFET8Edward Rawde
21 May07:39 i i      `* Re: LTSpice model for a SiC MOSFET7Bill Sloman
21 May14:42 i i       `* Re: LTSpice model for a SiC MOSFET6Edward Rawde
21 May16:26 i i        +- Re: LTSpice model for a SiC MOSFET1Bill Sloman
21 May16:37 i i        `* Re: LTSpice model for a SiC MOSFET4john larkin
21 May16:43 i i         +* Re: LTSpice model for a SiC MOSFET2Edward Rawde
21 May18:52 i i         i`- Re: LTSpice model for a SiC MOSFET1Bill Sloman
21 May18:49 i i         `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
19 May14:33 i `* Re: LTSpice model for a SiC MOSFET14legg
19 May18:21 i  +* Re: LTSpice model for a SiC MOSFET11Bill Sloman
19 May20:48 i  i`* Re: LTSpice model for a SiC MOSFET10legg
20 May08:49 i  i `* Re: LTSpice model for a SiC MOSFET9Bill Sloman
20 May15:53 i  i  `* Re: LTSpice model for a SiC MOSFET8legg
20 May16:44 i  i   +* Re: LTSpice model for a SiC MOSFET4john larkin
20 May18:15 i  i   i`* Re: LTSpice model for a SiC MOSFET3Bill Sloman
21 May03:42 i  i   i `* Re: LTSpice model for a SiC MOSFET2john larkin
21 May07:46 i  i   i  `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May18:05 i  i   `* Re: LTSpice model for a SiC MOSFET3Bill Sloman
21 May13:11 i  i    `* Re: LTSpice model for a SiC MOSFET2legg
21 May16:41 i  i     `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May15:04 i  `* Re: LTSpice model for a SiC MOSFET2john larkin
20 May18:25 i   `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
18 May17:03 +- Re: LTSpice model for a SiC MOSFET1legg
18 May17:12 +* Re: LTSpice model for a SiC MOSFET6legg
19 May09:27 i`* Re: LTSpice model for a SiC MOSFET5Bill Sloman
19 May13:48 i `* Re: LTSpice model for a SiC MOSFET4legg
19 May14:12 i  `* Re: LTSpice model for a SiC MOSFET3Bill Sloman
19 May20:28 i   `* Re: LTSpice model for a SiC MOSFET2legg
20 May09:36 i    `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
19 May16:13 +* Re: LTSpice model for a SiC MOSFET26Liz Tuddenham
19 May17:56 i+* Re: LTSpice model for a SiC MOSFET6john larkin
22 May09:44 ii`* Re: LTSpice model for a SiC MOSFET5Liz Tuddenham
22 May15:36 ii `* Re: LTSpice model for a SiC MOSFET4john larkin
22 May16:50 ii  `* Re: LTSpice model for a SiC MOSFET3Liz Tuddenham
22 May17:50 ii   `* Re: LTSpice model for a SiC MOSFET2john larkin
23 May10:04 ii    `- Re: LTSpice model for a SiC MOSFET1Liz Tuddenham
20 May09:46 i`* Re: LTSpice model for a SiC MOSFET19Bill Sloman
20 May10:58 i +* Re: LTSpice model for a SiC MOSFET8Liz Tuddenham
20 May18:34 i i`* Re: LTSpice model for a SiC MOSFET7Bill Sloman
21 May12:05 i i `* Re: LTSpice model for a SiC MOSFET6Liz Tuddenham
21 May13:44 i i  +* Re: LTSpice model for a SiC MOSFET3Bill Sloman
21 May14:19 i i  i`* Re: LTSpice model for a SiC MOSFET2Liz Tuddenham
21 May16:51 i i  i `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
21 May15:41 i i  `* Re: LTSpice model for a SiC MOSFET2john larkin
21 May18:55 i i   `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May18:47 i `* Re: LTSpice model for a SiC MOSFET10KevinJ93
21 May08:20 i  `* Re: LTSpice model for a SiC MOSFET9Bill Sloman
22 May02:20 i   `* Re: LTSpice model for a SiC MOSFET8KevinJ93
22 May09:12 i    `* Re: LTSpice model for a SiC MOSFET7Bill Sloman
22 May11:43 i     `* Re: LTSpice model for a SiC MOSFET6piglet
22 May14:41 i      +* Re: LTSpice model for a SiC MOSFET3Bill Sloman
22 May19:46 i      i`* Re: LTSpice model for a SiC MOSFET2piglet
23 May06:17 i      i `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
22 May15:42 i      `* Re: LTSpice model for a SiC MOSFET2john larkin
22 May17:28 i       `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
19 May19:35 `* Re: LTSpice model for a SiC MOSFET4Edward Rawde
20 May08:54  `* Re: LTSpice model for a SiC MOSFET3Bill Sloman
20 May15:28   `* Re: LTSpice model for a SiC MOSFET2Edward Rawde
20 May18:42    `- Re: LTSpice model for a SiC MOSFET1Bill Sloman

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