Re: LTSpice model for a SiC MOSFET

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Sujet : Re: LTSpice model for a SiC MOSFET
De : sunaecoNoChoppedPork (at) *nospam* gmail.com (JM)
Groupes : sci.electronics.design
Date : 25. May 2025, 19:20:40
Autres entêtes
Organisation : A noiseless patient Spider
Message-ID : <eqn63k9mu6670do54hhvor6qk1pkghqiu8@4ax.com>
References : 1 2 3
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On Mon, 19 May 2025 12:23:54 +1000, Bill Sloman <bill.sloman@ieee.org>
wrote:

On 19/05/2025 12:15 am, john larkin wrote:
On Sun, 18 May 2025 18:11:58 +1000, Bill Sloman <bill.sloman@ieee.org>
wrote:
 
I'm looking at a problem where somebody wants to step down a 1kV low
current source to 3.3V.
>
The Baxandall class-D oscillator could do it, but it needs a pair 1.7kV
MOSFETs for the job. The Infineon SiC IMH170R450M1 would do it - though
it's a much higher current part (10A) than the job needs (about 1mA).
>
I've dived into the Infineon rabbit-hole which promises LTSpice models,
but wasn't able to find one.
>
Does anybody know of a similar - ideally cheaper and smaller - part for
which there is an LTSpice model?
 
I use a Cree/Wolfspeed 1200v part, C2M0280120D, in my Pockels Cell
driver.
 
https://www.dropbox.com/scl/fi/5arhyamrp0bl3tgb2fasn/DSC02771.JPG?rlkey=3ttcc2yt6s9nrtdouuv3aneol&raw=1
 
They do have an LT Spice model library that works.
 
Gate drive for SiC parts is a bear. I did it myself, but I think there
are chips for that now.
 
There are multi-kilovolt silicon mosfets too.
 
Baxandal looks to be inefficient and expensive as a low power
converter. The drain swing is 2x the supply voltage, and it needs two
fets and a difficult custom transformer.
>
It isn't going to be inefficient. That configuration is famous efficient.
>
The drain swing is actually 1.67 times the supply voltage, but it does

Where does 1.67 come from?

need two switching devices and a specially wound transformer (and we
know how reluctant you are to design them or get them made).
>
It is probably going to be too expensive for the application, and we'd
be grateful for your insights into a cheaper alternative. I can't think
of one.

Date Sujet#  Auteur
18 May 25 * LTSpice model for a SiC MOSFET114Bill Sloman
18 May 25 +* Re: LTSpice model for a SiC MOSFET62john larkin
19 May 25 i`* Re: LTSpice model for a SiC MOSFET61Bill Sloman
19 May 25 i +* Re: LTSpice model for a SiC MOSFET34john larkin
19 May 25 i i`* Re: LTSpice model for a SiC MOSFET33Bill Sloman
19 May 25 i i +* Re: LTSpice model for a SiC MOSFET16john larkin
19 May 25 i i i`* Re: LTSpice model for a SiC MOSFET15Bill Sloman
19 May 25 i i i `* Re: LTSpice model for a SiC MOSFET14Edward Rawde
19 May 25 i i i  +* Re: LTSpice model for a SiC MOSFET2john larkin
20 May 25 i i i  i`- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May 25 i i i  `* Re: LTSpice model for a SiC MOSFET11Bill Sloman
20 May 25 i i i   `* Re: LTSpice model for a SiC MOSFET10Mike Perkins
20 May 25 i i i    `* Re: LTSpice model for a SiC MOSFET9Bill Sloman
20 May 25 i i i     `* Re: LTSpice model for a SiC MOSFET [OT]8Liz Tuddenham
21 May 25 i i i      `* Re: LTSpice model for a SiC MOSFET [OT]7legg
21 May 25 i i i       +* Re: LTSpice model for a SiC MOSFET [OT]5Liz Tuddenham
21 May18:16 i i i       i`* Re: LTSpice model for a SiC MOSFET [OT]4john larkin
21 May18:51 i i i       i +* Re: LTSpice model for a SiC MOSFET [OT]2Phil Hobbs
21 May19:19 i i i       i i`- Re: LTSpice model for a SiC MOSFET [OT]1Bill Sloman
21 May21:14 i i i       i `- Re: LTSpice model for a SiC MOSFET [OT]1Liz Tuddenham
21 May 25 i i i       `- Re: LTSpice model for a SiC MOSFET [OT]1Bill Sloman
19 May 25 i i `* Re: LTSpice model for a SiC MOSFET16Edward Rawde
19 May 25 i i  +* Re: LTSpice model for a SiC MOSFET2john larkin
20 May 25 i i  i`- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May 25 i i  `* Re: LTSpice model for a SiC MOSFET13Bill Sloman
20 May 25 i i   `* Re: LTSpice model for a SiC MOSFET12Edward Rawde
20 May 25 i i    +- Re: LTSpice model for a SiC MOSFET1john larkin
20 May 25 i i    +- Re: LTSpice model for a SiC MOSFET1John R Walliker
20 May 25 i i    `* Re: LTSpice model for a SiC MOSFET9Bill Sloman
20 May 25 i i     `* Re: LTSpice model for a SiC MOSFET8Edward Rawde
21 May 25 i i      `* Re: LTSpice model for a SiC MOSFET7Bill Sloman
21 May 25 i i       `* Re: LTSpice model for a SiC MOSFET6Edward Rawde
21 May 25 i i        +- Re: LTSpice model for a SiC MOSFET1Bill Sloman
21 May 25 i i        `* Re: LTSpice model for a SiC MOSFET4john larkin
21 May 25 i i         +* Re: LTSpice model for a SiC MOSFET2Edward Rawde
21 May18:52 i i         i`- Re: LTSpice model for a SiC MOSFET1Bill Sloman
21 May18:49 i i         `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
19 May 25 i +* Re: LTSpice model for a SiC MOSFET20legg
19 May 25 i i+* Re: LTSpice model for a SiC MOSFET11Bill Sloman
19 May 25 i ii`* Re: LTSpice model for a SiC MOSFET10legg
20 May 25 i ii `* Re: LTSpice model for a SiC MOSFET9Bill Sloman
20 May 25 i ii  `* Re: LTSpice model for a SiC MOSFET8legg
20 May 25 i ii   +* Re: LTSpice model for a SiC MOSFET4john larkin
20 May 25 i ii   i`* Re: LTSpice model for a SiC MOSFET3Bill Sloman
21 May 25 i ii   i `* Re: LTSpice model for a SiC MOSFET2john larkin
21 May 25 i ii   i  `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May 25 i ii   `* Re: LTSpice model for a SiC MOSFET3Bill Sloman
21 May 25 i ii    `* Re: LTSpice model for a SiC MOSFET2legg
21 May 25 i ii     `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May 25 i i`* Re: LTSpice model for a SiC MOSFET8john larkin
20 May 25 i i `* Re: LTSpice model for a SiC MOSFET7Bill Sloman
26 May11:17 i i  `* Re: LTSpice model for a SiC MOSFET6Cursitor Doom
26 May14:44 i i   +* Re: LTSpice model for a SiC MOSFET2john larkin
26 May15:55 i i   i`- Re: LTSpice model for a SiC MOSFET1Bill Sloman
26 May15:49 i i   `* Re: LTSpice model for a SiC MOSFET3Bill Sloman
26 May22:51 i i    `* Re: LTSpice model for a SiC MOSFET2Cursitor Doom
27 May05:29 i i     `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
25 May19:20 i `* Re: LTSpice model for a SiC MOSFET6JM
26 May16:07 i  `* Re: LTSpice model for a SiC MOSFET5Bill Sloman
26 May16:57 i   `* Re: LTSpice model for a SiC MOSFET4JM
26 May17:43 i    `* Re: LTSpice model for a SiC MOSFET3Bill Sloman
27 May19:09 i     `* Re: LTSpice model for a SiC MOSFET2JM
28 May16:16 i      `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
18 May 25 +- Re: LTSpice model for a SiC MOSFET1legg
18 May 25 +* Re: LTSpice model for a SiC MOSFET6legg
19 May 25 i`* Re: LTSpice model for a SiC MOSFET5Bill Sloman
19 May 25 i `* Re: LTSpice model for a SiC MOSFET4legg
19 May 25 i  `* Re: LTSpice model for a SiC MOSFET3Bill Sloman
19 May 25 i   `* Re: LTSpice model for a SiC MOSFET2legg
20 May 25 i    `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
19 May 25 +* Re: LTSpice model for a SiC MOSFET35Liz Tuddenham
19 May 25 i+* Re: LTSpice model for a SiC MOSFET7john larkin
22 May09:44 ii`* Re: LTSpice model for a SiC MOSFET6Liz Tuddenham
22 May15:36 ii `* Re: LTSpice model for a SiC MOSFET5john larkin
22 May16:50 ii  `* Re: LTSpice model for a SiC MOSFET4Liz Tuddenham
22 May17:50 ii   `* Re: LTSpice model for a SiC MOSFET3john larkin
23 May10:04 ii    `* Re: LTSpice model for a SiC MOSFET2Liz Tuddenham
23 May14:54 ii     `- Re: LTSpice model for a SiC MOSFET1john larkin
20 May 25 i`* Re: LTSpice model for a SiC MOSFET27Bill Sloman
20 May 25 i +* Re: LTSpice model for a SiC MOSFET8Liz Tuddenham
20 May 25 i i`* Re: LTSpice model for a SiC MOSFET7Bill Sloman
21 May 25 i i `* Re: LTSpice model for a SiC MOSFET6Liz Tuddenham
21 May 25 i i  +* Re: LTSpice model for a SiC MOSFET3Bill Sloman
21 May 25 i i  i`* Re: LTSpice model for a SiC MOSFET2Liz Tuddenham
21 May16:51 i i  i `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
21 May 25 i i  `* Re: LTSpice model for a SiC MOSFET2john larkin
21 May18:55 i i   `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May 25 i `* Re: LTSpice model for a SiC MOSFET18KevinJ93
21 May 25 i  `* Re: LTSpice model for a SiC MOSFET17Bill Sloman
22 May02:20 i   `* Re: LTSpice model for a SiC MOSFET16KevinJ93
22 May09:12 i    +* Re: LTSpice model for a SiC MOSFET8Bill Sloman
22 May11:43 i    i`* Re: LTSpice model for a SiC MOSFET7piglet
22 May14:41 i    i +* Re: LTSpice model for a SiC MOSFET3Bill Sloman
22 May19:46 i    i i`* Re: LTSpice model for a SiC MOSFET2piglet
23 May06:17 i    i i `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
22 May15:42 i    i +* Re: LTSpice model for a SiC MOSFET2john larkin
22 May17:28 i    i i`- Re: LTSpice model for a SiC MOSFET1Bill Sloman
23 May15:26 i    i `- Re: LTSpice model for a SiC MOSFET1legg
27 May00:09 i    `* Re: LTSpice model for a SiC MOSFET7john larkin
27 May05:37 i     `* Re: LTSpice model for a SiC MOSFET6Bill Sloman
27 May14:16 i      `* Re: LTSpice model for a SiC MOSFET5Liz Tuddenham
19 May 25 +* Re: LTSpice model for a SiC MOSFET4Edward Rawde
27 May15:02 `* Re: LTSpice model for a SiC MOSFET5Joe Gwinn

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