Re: "RESET"

On 5/25/2025 12:20 PM, Carlos E. R. wrote:

On 2025-05-25 05:47, Ralph Mowery wrote:

While not really much of a chance but in the eairly days bits could be
randomally changed by stray radiation.

 And today. It is even a bigger chance, with lower logic voltages. Chips are not shielded.

Depending on the technology, just accessing a memory cell can degrade it's
content.  When you are storing a handful of electrons, any couple that
manage to "leak out" can alter the perceived state of that cell.
Accesses to "nearby" cells/wordlines, etc.
Expecting memory to "remember" is naive, nowadays.
For devices that load RAM from a (slower) FLASH store, there is no
guarantee that the contents of the RAM mirror the FLASH any time later.
Even assuming errant software doesn't "accidentally" corrupt it.
Do you *routinely* verify it's integrity?  How often?  What do
you do WHEN you discover a bit has been corrupted in the TEXT?
How confident does that make you about the DATA??
"Oh, the hardware is reliable"  Then, you should be able to PROVE
this assertion.  Monitor EVERY access (in a test fixture) and
verify they agree with a duplicate store maintained "outside"
the product.
Or, just look at the research others have done and realize your reliability
assumptions are likely wishful thinking.  ("Ah, but we can blame the
software for any anomalous behavior!"  And, NEVER manage to find "the bug"
or FIX it!)
In the days of toy products (a few kiloBITS of RAM made with very
large geometries and slow cycle times), you could reasonably hope
for a long time between failures.  (And, failures need not manifest
as changes from desired behavior!  "4 >> 1" yields the same result
as "5 >> 1".  "JMP if ODD" yields the same behavior as "JMP unconditionally"
if the test just *happens* to be ODD)
Nowadays, its so easy to have megabytes and gigabytes of RAM in
a device and few XIP like days of old.  So, the risks causes double.