Re: LTSpice model for a SiC MOSFET

Bill Sloman <bill.sloman@ieee.org> wrote:

On 27/05/2025 9:09 am, john larkin wrote:

[...]

The specs, as far as I can tell, suggest 1KV at 1 ma in and 3.3v at 3
ma out. The required efficiency is then 1%.

 
Actually 1kV at 10uA in.

Good grief!   A 10-megohm quarter watt resistor with a zener diode is
the obvious answer.

 [...]

Misunderstanding the constraints can lead people to propose
inappropriate solutions.

How can anyone misunderstand something they have never been told?


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