Re: LTSpice model for a SiC MOSFET

On 6/06/2025 12:50 am, john larkin wrote:

On Tue, 27 May 2025 14:16:11 +0100, liz@poppyrecords.invalid.invalid
(Liz Tuddenham) wrote:
 

Bill Sloman <bill.sloman@ieee.org> wrote:
>

On 27/05/2025 9:09 am, john larkin wrote:

>
[...]

The specs, as far as I can tell, suggest 1KV at 1 ma in and 3.3v at 3
ma out. The required efficiency is then 1%.

>
Actually 1kV at 10uA in.

>
Good grief!   A 10-megohm quarter watt resistor with a zener diode is
the obvious answer.

It's not any kind of answer to the question I was asked.

A 3.3v zener will probably leak more than 10uA. Low voltage zeners are
awful.
 And he wants 3 mA out... I think.

The original question talked about 50% efficiency which would have been 1.5mA, but it wasn't any kind of specified requirement.

Misunderstanding the constraints can lead people to propose
inappropriate solutions.

>
How can anyone misunderstand something they have never been told?

 Bill was the confused person.

John Larkin does like posting claims like that. He gets confused at least as often as the rest of us, but is remarkably reluctant to admit it.

The problem gets much more interesting with 10 uA in and 99%
efficiency requirement.

There never was a 99% efficiency requirement. Jim Williams got 93% efficiency going the other way, but that's a very different problem, and he worked on it for years, if his series of applications notes are anything to go by.

A Baxandall isn't going pull microamps at 1 KV.

The examples I've simulated pulls about 10uA - some of that is being dissipated in the circulating current in the tank circuit in the transformer, but the MOSFets dissipate a certain amount of energy every time they turn on and off. One of the virtues of the Baxandall configuration is that the switching happen when there isn't much of a voltage drop across the transistors when they are switching, so it isn't too bad.
--
Bill Sloman, Sydney