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On 3/8/2025 2:54 AM, Fred. Zwarts wrote:Do anything except map the halting function:Op 08.mrt.2025 om 02:09 schreef olcott:It is ridiculously stupid to expect a simulatingOn 3/7/2025 9:33 AM, dbush wrote:>On 3/7/2025 10:30 AM, olcott wrote:>On 3/7/2025 9:15 AM, Fred. Zwarts wrote:>Op 07.mrt.2025 om 15:49 schreef olcott:>On 3/7/2025 2:02 AM, joes wrote:Strawman. HHH fails to reach the 'ret' instruction, so HHH fails to do a compete simulation.Am Thu, 06 Mar 2025 20:59:49 -0600 schrieb olcott:>On 3/6/2025 6:37 PM, Richard Damon wrote:>On 3/6/25 3:16 PM, olcott wrote:On 3/6/2025 3:17 AM, Fred. Zwarts wrote:Op 06.mrt.2025 om 05:46 schreef olcott:On 3/5/2025 5:36 PM, Richard Damon wrote:On 3/5/25 4:03 PM, dbush wrote:On 3/5/2025 3:55 PM, olcott wrote:On 3/5/2025 10:14 AM, joes wrote:Am Wed, 05 Mar 2025 08:10:00 -0600 schrieb olcott:On 3/5/2025 6:19 AM, Richard Damon wrote:On 3/5/25 12:09 AM, olcott wrote:So what's the next step?*DD correctly emulated by HHH cannot possibly reach*What is the next step?My proof requires a specific prerequisite order.I WILL NOT TOLERATE ANY OTHER ORDERIn other words, you CAN'T handle any other order, even though
logically requried, because you need to hide your fraud.
One cannot learn algebra before one has learned to count to
ten. DD correctly emulated by HHH cannot possibly reach its own
"ret" instruction and terminate normally.
Is the first step of the mandatory prerequisite order of my
proof
*its own "ret" instruction and terminate normally*
It has taken two years to create this first step such that it is
the the simplest way to state the key element of the whole proof
and make this element impossible to correctly refute.
EVERY ATTEMPT TO CHANGE THE SUBJECT AWAY FROM THIS POINT IS
DISHONEST.
>Yes, that is the directly executed program.That is a stupid thing to say.Before agreeing on an answer, it is first required to agree on theWhich is the problem, since you don't have the correct question.
question.
If HHH is a Halt Decider / Termination analyzer, the ONLY behavior
that matters is the behavior of the directly executed program whose
description is provided.
HHH computes the mapping to a return value on the basis of what its
finite string INPUT specifies.
>No, DD doesn't specify anything about what is to simulate it.THIS IS WHAT IT SPECIFIES *DD correctly emulated by HHH cannot
possibly reach its own "ret" instruction and terminate normally*
>No, HHH aborts.Yes, that is what HHH reports: I cannot complete the simulation up toThe finite string of DD correctly emulated by HHH specifies recursive
the end. No more, no less.
There are easier ways to make a program to report the failure of a
simulation.
emulation that cannot possibly reach its own "ret" instruction BECAUSE
IT SPECIFIES RECURSINVE EMULATION.
>But the HHH that decides are returns can't be that HHH, so the DD givenThat seems to be a little incoherent so I cannot tell what you are
to that HHH doesn't call the correctly emulating HHH, so you whole
argument is shown to be the fraud you have admitted to.
saying yet you are at least attempting to use reasoning.
I am just saying what the actual x86 machine code actually specifies
therefore any rebuttal is necessarily incorrect.And the actual code of DD specifies that it halts.*Straw-man deception*
>
>
DD correctly emulated by HHH cannot possibly
reach its own "ret" instruction and terminate normally
because DD calls HHH(DD) in recursive emulation.
>
Simulating termination analyzer HHH
So you're saying it maps the halting function?
>
(<X>,Y) maps to 1 if and only if X(Y) halts when executed directly
(<X>,Y) maps to 0 if and only if X(Y) does not halt when executed directly
>
>
DD correctly emulated by HHH cannot possibly
reach its own "ret" instruction and terminate normally
because DD calls HHH(DD) in recursive emulation.
>
Yes. And what is the advantage of a simulator HHH that reports that it cannot possibly complete the simulation of a proven halting program up to the end, because it gets stuck in simulating *itself*?
termination analyzer to
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