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On 5/7/2025 7:16 PM, olcott wrote:When N instructions of DD are emulated by HHHOn 5/7/2025 6:10 PM, dbush wrote:If you don't want to be called out lying, don't lie.On 5/7/2025 7:05 PM, olcott wrote:>On 5/7/2025 5:05 PM, dbush wrote:>On 5/7/2025 5:56 PM, olcott wrote:>On 5/7/2025 4:47 PM, dbush wrote:>On 5/7/2025 5:46 PM, olcott wrote:>On 5/7/2025 4:30 PM, Richard Heathfield wrote:>On 07/05/2025 20:35, olcott wrote:>On 5/7/2025 1:59 PM, Richard Heathfield wrote:>On 07/05/2025 19:31, olcott wrote:
<snip>
>>>>>
I already know that the contradictory part of the
counter-example input has always been unreachable code.
If the code is unreachable, it can't be part of a working program, so simply remove it.
It is unreachable by the Halting Problem counter-example
input D when correctly simulated by the simulating
termination analyzer H that it has been defined to thwart.
If the simulation can't reach code that the directly executed program reaches, then it's not a faithful simulation.
>
If is was true that it is not a faithful simulation
then you would be able to show exactly what sequence
of instructions would be a faithful simulation.
>
The sequence executed by HHH1, as you are on record as admitting is correct:
>
What exact sequence of the following machine addresses
of DD emulated by HHH
Which it does incorrectly as you have admitted on the record:
>
Liar
And *yet again* you lie about having made such an admission when the evidence is right there below in black and white for all to see.
>
Your dishonesty knows no bounds.
>
And the fact that you trimmed the below in your reply in an attempt to hide the fact that you lied further shows your dishonesty.
>>>
Yet you cannot show how to do it correctly
Like HHH1 does, as you have admitted on the record:
>
>
On 5/6/2025 5:17 PM, dbush wrote:
> On 5/6/2025 5:03 PM, olcott wrote:
>> On 5/6/2025 3:51 PM, dbush wrote:
>>> On 5/6/2025 4:46 PM, olcott wrote:
>>>> On 5/6/2025 3:31 PM, dbush wrote:
>>>>> Then what is the first instruction emulated by HHH that differs
>>>>> from the emulation performed by UTM?
>>>>>
>>>>
>>>> HHH1 is exactly the same as HHH except that DD
>>>> does not call HHH1. This IS the UTM emulator.
>>>> It does not abort.
>>>
>>> Last chance:
>>>
>>> What is the first instruction emulated by HHH that differs from the
>>> emulation performed by HHH1?
>>
>> Go back and read the part you ignored moron.
>
> Let the record show that Peter Olcott has neglected to identify an
> instruction that HHH emulates differently from HHH1.
>
>>> Failure to provide this in your next message or within one hour of
>>> your next post in this newsgroup will be taken as your official on-
>>> the-record admission that the emulations performed by HHH and HHH1
>>> are in fact exactly the same up until the point that HHH aborts, at
>>> which point HHH did not correctly simulate the last instruction it
>>> simulated as you are previously on record as admitting.
>
> Therefore, as per the above requirements:
>
> LET THE RECORD SHOW
>
> That Peter Olcott
>
> Has *officially* admitted
>
> That the emulations performed by HHH and HHH1 are in fact exactly the
> same up until the point that HHH aborts, at which point HHH did not
> correctly simulate the last instruction it simulated as he is previously
> on record as admitting.
>
>On 5/5/2025 8:24 AM, dbush wrote:
> On 5/4/2025 11:03 PM, dbush wrote:
>> On 5/4/2025 10:05 PM, olcott wrote:
>>> On 5/4/2025 7:23 PM, Richard Damon wrote:
>>>> But HHH doesn't correct emulated DD by those rules, as those rules
>>>> do not allow HHH to stop its emulation,
>>>
>>> Sure they do you freaking moron...
>>
>> Then show where in the Intel instruction manual that the execution of
>> any instruction other than a HLT is allowed to stop instead of
>> executing the next instruction.
>>
>> Failure to do so in your next reply, or within one hour of your next
>> post on this newsgroup, will be taken as you official on-the- record
>> admission that there is no such allowance and that HHH does NOT
>> correctly simulate DD.
>
> Let the record show that Peter Olcott made the following post in this
> newsgroup after the above message:
>
> On 5/4/2025 11:04 PM, olcott wrote:
> > D *WOULD NEVER STOP RUNNING UNLESS*
> > indicates that professor Sipser was agreeing
> > to hypotheticals AS *NOT CHANGING THE INPUT*
> >
> > You are taking
> > *WOULD NEVER STOP RUNNING UNLESS*
> > to mean *NEVER STOPS RUNNING* that is incorrect.
>
> And has made no attempt after over 9 hours to show where in the Intel
> instruction manual that execution is allowed to stop after any
> instruction other than HLT.
>
stupidly moronic
>
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