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On 5/12/2025 6:46 AM, dbush wrote:False. When one instruction of algorithm DDD1 is emulated by algorithm HHH1, algorithm HHH1 is unable to simulate to a final state.On 5/12/2025 12:11 AM, olcott wrote:In other words you are clueless about mathematical induction.On 5/11/2025 10:54 PM, dbush wrote:>On 5/11/2025 11:50 PM, olcott wrote:>On 5/11/2025 10:39 PM, dbush wrote:>On 5/11/2025 11:36 PM, olcott wrote:>>>
You try to get away with changing the subject
because you know that you are lying about one
or more steps of DDD emulated by HHH according
to the rules of the x86 language
It is you who are changing the subject away from DDD emulated by HHH (not one or more steps of DDD emulated by HHH) which you have admitted for the record is not correct:
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I am only referring to the hypothetical infinite
set of pure x86 emulators specified below:
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Each of which is processing a distinct, different input.
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Changing the input is not allowed.
I am examining all the elements of a infinite set
such that each HHH/DDD pair has a specific fixed form.
And each one has a distinctly different input, and as such the halt status of one is unrelated to the halt status of another.
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Changing the input is not allowed.
It is true that when one step of DDD is emulated by HHH that
DDD does not halt.
It is true that when N steps of DDD are emulated by HHH thatFalse. When one instruction of algorithm DDDN is emulated by algorithm HHHN, algorithm HHHN is unable to simulate to a final state.
DDD does not halt.
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