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On 6/2/2025 2:00 AM, Fred. Zwarts wrote:But there is no "itself" in the x86 language here.Op 02.jun.2025 om 05:16 schreef olcott:*You already just said the difference*On 6/1/2025 9:43 PM, Mike Terry wrote:Verifiable counterfactual.On 01/06/2025 17:23, olcott wrote:>On 6/1/2025 10:42 AM, Mike Terry wrote:>On 01/06/2025 05:01, olcott wrote:On 5/31/2025 10:32 PM, Mike Terry wrote:[..snip..]On 01/06/2025 02:31, olcott wrote:On 5/31/2025 7:44 PM, Mike Terry wrote:On 01/06/2025 01:18, olcott wrote:
Your response below basically says that you don't understand what "simulation" is.
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That's not at all surprising, but given this, you are in no position to make assertions about whether two simulations are the same or not, up to the point where one of them is aborted.
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I'll probably go back up the thread to where I asked you questions, and just give the answers myself for the record.
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We cannot do a separate side-by-side execution trace of
HHH(DDD) and HHH1(DDD) because the DDD simulated by HHH1
calls HHH(DDD) as a part of this same simulation.
Duh! The DDD simulated by HHH ALSO calls HHH(DDD) as a part of the same simulation.
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They BOTH call HHH(DDD) as part of the simulation. Duuuuuh....
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I've presented the two traces to you side by side on more than one occasion. Do you really have no recollection of that? Your explanation of why we supposedly can't put them side by side is literally gibberish!
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From the trace shown below we can see that HHH simulates
DDD one whole execution trace more than HHH1 does.
Really? That's not at all what I see - but perhaps you can explain what you're saying.
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Mark on the trace below where you think HHH1's simulation [i.e. the simulation /performed/ by HHH1] starts and ends. Also mark where you think HHH's simulation starts and ends.
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Then to save me the trouble, try to put them side by side to see if they match up...
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Mike.
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I really appreciate your sincere honesty and the great
diligence that you have shown evaluating my work. No
one else on the planet has put nearly the same effort
as you in carefully evaluating the key details of my work.
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There is a terminology issue here to resolve.
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If A simulates B and B simulates C, what should a "trace" of A's simulation look like?
a) it includes both B's and C's instructions, interlaced.
b) it is just B's instructions.
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HHH1(DDD) simulates one instance of DDD.
HHH(DDD) simulates DDD and simulates itself simulating DDD
and then aborts after it has already simulated DDD one more
time than HHH1 ever does.
HHH1(DDD) simulates one instance of DDD, then its nested simulations.
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HHH(DDD) simulates one instance of DDD, then its nested simulations.
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IT'S THE SAME, UP TO THE POINT WHERE DDD IS ABORTED, EXACTLY AS I CLAIMED.
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(1) HHH simulates DDD and then simulates itself simulating DDD.
(2) HHH1 never ever simulates itself.
These two are not the same.
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As soon as HHH simulates the very first instruction of
itself the simulation of DDD by HHH1 and the simulation
of DDD by HHH diverges.
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Show in the trace where the first instruction of HHH simulating itself is different from the first instruction of HHH simulated by HHH1.
There is no such difference.
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The first instruction of HHH simulating itself
simulating DDD has no corresponding HHH1 simulating
itself simulating DDD.
No, you LIE about a difference, because you don't show a correct simulation, because you KNOW it will prove you wrong.That you keep refusing to show this difference, is a strong indication that you know that you are wrong.I have shown the difference. I will make a new post
and show this difference more clearly.
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