On 6/4/2025 11:31 AM, olcott wrote:
On 6/4/2025 6:32 AM, dbush wrote:
On 6/3/2025 11:53 PM, olcott wrote:
>
Counter-factual as anyone that understands
the x86 language can clearly see.
>
>
_DDD()
[00002183] 55 push ebp
[00002184] 8bec mov ebp,esp
[00002186] 6883210000 push 00002183 ; push DDD
[0000218b] e833f4ffff call 000015c3 ; call HHH
[00002190] 83c404 add esp,+04
[00002193] 5d pop ebp
[00002194] c3 ret
Size in bytes:(0018) [00002194]
// First four instructions of DDD emulated by HHH1
Begin Local Halt Decider Simulation Execution Trace Stored at:1138d9
[00002183][001138c9][001138cd] 55 push ebp ; DDD of HHH1
[00002184][001138c9][001138cd] 8bec mov ebp,esp ; DDD of HHH1
[00002186][001138c5][00002183] 6883210000 push 00002183 ; push DDD
[0000218b][001138c1][00002190] e833f4ffff call 000015c3 ; call HHH
New slave_stack at:14e2f9
// First four instructions of DDD emulated by emulated HHH
Begin Local Halt Decider Simulation Execution Trace Stored at:15e301
[00002183][0015e2f1][0015e2f5] 55 push ebp ; DDD of HHH[0]
[00002184][0015e2f1][0015e2f5] 8bec mov ebp,esp ; DDD of HHH[0]
[00002186][0015e2ed][00002183] 6883210000 push 00002183 ; push DDD
[0000218b][0015e2e9][00002190] e833f4ffff call 000015c3 ; call HHH
New slave_stack at:198d21
// First four instructions of DDD emulated by emulated emulated HHH
[00002183][001a8d19][001a8d1d] 55 push ebp ; DDD of HHH[1]
[00002184][001a8d19][001a8d1d] 8bec mov ebp,esp ; DDD of HHH[1]
[00002186][001a8d15][00002183] 6883210000 push 00002183 ; push DDD
[0000218b][001a8d11][00002190] e833f4ffff call 000015c3 ; call HHH
Local Halt Decider: Infinite Recursion Detected Simulation Stopped
>
False, as the side-by-side trace show exactly that and as you have admitted on the record *multiple times*:
>
There isn't enough room to put them side-by-side.
The first paragraph is HHH1 simulating DDD
The second paragraph is HHH simulating DDD
The third paragraph is HHH simulating itself DDD
There is no corresponding HHH1 simulating itself
Irrelevent. A simulation by definition is not affected by what happened before the simulation started.
What is relevant is that both HHH and HHH1 simulate DDD once, which includes simulating the code of HHH which in turn simulates DDD, and both are the same up to the point that HHH aborts, which you have admitted *multiple times* on the record:
On 5/6/2025 5:17 PM, dbush wrote:
> On 5/6/2025 5:03 PM, olcott wrote:
>> On 5/6/2025 3:51 PM, dbush wrote:
>>> On 5/6/2025 4:46 PM, olcott wrote:
>>>> On 5/6/2025 3:31 PM, dbush wrote:
>>>>> Then what is the first instruction emulated by HHH that differs
>>>>> from the emulation performed by UTM?
>>>>>
>>>>
>>>> HHH1 is exactly the same as HHH except that DD
>>>> does not call HHH1. This IS the UTM emulator.
>>>> It does not abort.
>>>
>>> Last chance:
>>>
>>> What is the first instruction emulated by HHH that differs from the
>>> emulation performed by HHH1?
>>
>> Go back and read the part you ignored moron.
>
> Let the record show that Peter Olcott has neglected to identify an
> instruction that HHH emulates differently from HHH1.
>
>>> Failure to provide this in your next message or within one hour of
>>> your next post in this newsgroup will be taken as your official on-
>>> the-record admission that the emulations performed by HHH and HHH1
>>> are in fact exactly the same up until the point that HHH aborts, at
>>> which point HHH did not correctly simulate the last instruction it
>>> simulated as you are previously on record as admitting.
>
> Therefore, as per the above requirements:
>
> LET THE RECORD SHOW
>
> That Peter Olcott
>
> Has *officially* admitted
>
> That the emulations performed by HHH and HHH1 are in fact exactly the
> same up until the point that HHH aborts, at which point HHH did not
> correctly simulate the last instruction it simulated as he is previously
> on record as admitting.
On 6/3/2025 10:54 PM, dbush wrote:
> On 6/3/2025 10:51 PM, olcott wrote:
>> On 6/3/2025 9:42 PM, dbush wrote:
>>> On 6/3/2025 10:29 PM, olcott wrote:
>>>> On 6/3/2025 8:57 PM, dbush wrote:
>>>>> So how exactly do HHH and HHH1 emulate the first instruction of HHH
>>>>> differently?
>>>>>
>>>>
>>>> The question is incorrect.
>>>> HHH emulates DDD two times and HHH1 emulates DDD one time
>>>> the whole second time is the divergence.
>>>
>>> There is no divergence if the instructions are emulated exactly the
>>> same in both cases.
>>
>> HHH1(DDD) emulates DDD exactly one time.
>> HHH(DDD) emulates DDD exactly two times.
>>
>> The whole second time that HHH emulates DDD is
>> divergence.
>>
>
> Let the record show that Peter Olcott has failed to identify an
> instruction that HHH and HHH1 emulated differently.
>
>>
>>> What happened before either emulation started is irrelevant.
>>>
>>> The only way for the emulations to diverge is if there is a
>>> particular instruction such that X happens if HHH emulates it and Y
>>> happens if HHH1 emulates it. Again, what happened before either
>>> emulation started is irrelevant.
>>>
>>>
>>> So I'll ask one more time: how exactly do HHH and HHH1 emulate the
>>> first instruction of HHH, or *any* instruction that is part of the
>>> emulation of DDD, differently?
>>>
>>> Failure to provide the above explanation in your next reply or within
>>> one hour of your next post in this newsgroup will be taken as your
>>> official on-the-record admission that the emulations of DDD performed
>>> by HHH and HHH1 do *not* diverge but are in fact the same up to the
>>> point that HHH aborts.
>
> Therefore, as per the above criteria:
>
> Let The Record Show
>
> That Peter Olcott
>
> Has *officially* admitted:
>
> That the emulations of DDD by HHH and HHH1 in fact do *not* diverge but
> are in fact the same up to the point that HHH aborts.