Re: Title: A Structural Analysis of the Standard Halting Problem Proof

Am Thu, 24 Jul 2025 16:41:26 -0500 schrieb olcott:

On 7/24/2025 4:24 PM, joes wrote:

Am Thu, 24 Jul 2025 09:32:45 -0500 schrieb olcott:

Aborting prematurely literally means that after N instructions of DDD
are correctly emulated by HHH that this emulated DDD would reach its
own emulated "ret" instruction final halt state.
What value of N are you proposing?

 
Let's see: the call to HHH is #4, [waves hands], then another 4 inside
the next level of simulation, and after another 4 the first simulated
HHH (the one called by the input, not the outermost simulator. We are
now 3 levels in) decides that enough is enough and aborts,

 
Thus immediate killing its simulated DDD and everything else that HHH
was simulating thus no simulated DDD or simulated HHH can possibly ever
return no matter how many or how few X86 instructions that the executed
HHH correctly emulates.
This is the part that you fail to understand or understand that I am
correct and disagree anyway.

You failed to understand I was talking about the first simulated HHH
aborting, not the outermost simulator.

returning to the outermost level which takes 3 more instructions to
halt, whereupon our treasured HHH returns that DDD halts. So,
4+4+4+3=15?
 
Of course the crux is that changing "HHH" changes the input, so HHH can
never do it.

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Am Sat, 20 Jul 2024 12:35:31 +0000 schrieb WM in sci.math:
It is not guaranteed that n+1 exists for every n.