On my AMD FX-8370 I don't benefit from a compact code area.

I test lina64 on my AMD FX-8370 8 core 4 Ghz.

The genuine Byte benchmark sieve takes 1.5 ms on my unmodified lina.
That is a indirect threaded Forth with no optimisation and all the
machine code scattered throughout the dictionary.

I build a version where there is actually a code segment and all code is
collected there. There was no significant difference in speed.

All the code of the Forth fits comfortable in the L1 cache.
Is this to be expected?
An  L1 cache hit is an L1 cache hit?

Could Intel processors respond more to this distinction?


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