Re: A state transition diagram proves ... GOOD PROGRESS

On 10/18/24 9:04 PM, olcott wrote:

On 10/18/2024 6:19 PM, Richard Damon wrote:

On 10/18/24 12:39 PM, olcott wrote:

On 10/18/2024 9:41 AM, joes wrote:

Am Fri, 18 Oct 2024 09:10:04 -0500 schrieb olcott:

On 10/18/2024 6:17 AM, Richard Damon wrote:

On 10/17/24 11:47 PM, olcott wrote:

On 10/17/2024 10:27 PM, Richard Damon wrote:

On 10/17/24 9:47 PM, olcott wrote:

On 10/17/2024 8:13 PM, Richard Damon wrote:

On 10/17/24 7:31 PM, olcott wrote:

>

When DDD is correctly emulated by HHH according to the semantics
of the x86 language DDD cannot possibly reach its own machine
address [00002183] no matter what HHH does.
+-->[00002172]-->[00002173]-->[00002175]-->[0000217a]--+

>

Except that 0000217a doesn't go to 00002172, but to 000015d2

>

The Emulating HHH sees those addresses at its begining and then never
again.
Then the HHH that it is emulating will see those addresses, but not the
outer one that is doing that emulation of HHH.
And so on.
Which HHH do you think EVER gets back to 00002172?
What instruction do you think that it emulates that would tell it to do
so?

>

At best the trace is:
00002172 00002173 00002175 0000217a conditional emulation of 00002172
conditional emulation of 00002173 conditional emulation of 00002175
conditional emulation of 0000217a CE of CE of 00002172 ...

OK great this is finally good progress.

The more interesting part is HHH simulating itself, specifically the
if(Root) check on line 502.
>

>
That has nothing to do with any aspect of the emulation
until HHH has correctly emulated itself emulating DDD.
>

and if HHH decides to abort its emulation, it also should know that
every level of condition emulation it say will also do the same thing,

If I understand his words correctly Mike has already disagreed with
this.

He hasn't.
>

Message-ID: <rLmcnQQ3-N_tvH_4nZ2dnZfqnPGdnZ2d@brightview.co.uk>
On 3/1/2024 12:41 PM, Mike Terry wrote:
  > Obviously a simulator has access to the internal state (tape contents
  > etc.) of the simulated machine. No problem there.
This seems to indicate that the Turing machine UTM version of HHH can
somehow see each of the state transitions of the DDD resulting from
emulating its own Turing machine description emulating DDD.

>

Of course. It needs to, in order to simulate it. Strictly speaking
it has no idea of its simulation of a simulation two levels down,
only of the immediate simulation; the rest is just part of whatever
program the simulated simulator is simulating, which happens to be
itself.
>

>
 From the concrete execution trace of DDD emulated by HHH
according to the semantics of the x86 language people with
sufficient technical competence can see that the halt status
criteria that professor Sipser agreed to has been met.

>
Nope.
>
Proven previously and you accepted by default by not pointing out an error.
>
Your HHH neither "correctly simulated" per his definitions or correctly predicts the behavior of such a simulation, and thus never acheived the required criteria.
>

 So you are still trying to stupidly get away with saying
that when a finite string of x86 code is emulated according
to the semantics of the x86 language
 (including HHH emulating itself emulating DDD)
THAT THE EMULATION CAN BE WRONG ???
 

It is WRONG for the determination of the final behavior of DDD it is aborted.
Remember, the "semantics of the x86 processor" includes the fact that the x86 processor WON'T STOP until it reaches a terminal instruction, and thus stopping before that isn't actually correct.
If you are willing to admit partial behavior, it can be correct, but saying it will "never" do something, is unsupported.